1. Field of the Invention
The present invention relates to a gate driving circuit for driving a power switching element.
2. Description of the Related Art
Along with larger capacitance and a higher speed of a switching element, power inverters applying power switching elements have been steadily expanding their area of application. In particular, among these power switching elements, switching elements of metal-oxide semiconductor (MOS) gate types such as an insulated gate bipolar transistor (IGBT) and a metal-oxide semiconductor field-effect transistor (MOSFET) have recently been extending their field of application.
The IGBT and MOSFET are non-latching type switching elements that are not continuously in an on/off state on their own. When compared with latching type switching elements such as a thyristor, they are greatly advantageous in that delicate control from outside the switching element is available in switching transition periods of turning-on and turning-off.
In recent years, with respect to the IGBTs and the like, large-capacitance elements capable of enduring high voltages and large electric currents have entered the market, and the construction of self commutated inverters for electric power systems has been started using the IGBTs. In the inverters for electric power systems, rated voltages normally become extremely high to reduce loss during power transmission. Therefore, the inverters need to have a high voltage, for example, a direct current voltage of 50 kV, which is an even higher voltage.
To construct such high-voltage inverters, it is indispensable to serially connect a plurality of switching elements. In this case, a problem is variation in voltages in turn-on and off periods among the respective switching elements. This is because voltage allocations can be easily balanced when the switching elements are in a steady off state, however, in the transition periods, small variations in switching timings become a cause of greatly unbalanced voltage allocations, which lead to element destruction.
Moreover, even when the switching elements are not serially connected, switching loss of the elements is often becomes a problem. In particular, switching loss dramatically increases when a switching speed of the element is unavoidably reduced in consideration of electromagnetic interference against peripheral electronic equipment. Therefore, it becomes necessary to lower the rating of a device or to install a large cooling device to cool down the elements.
In contrast, for example, a technology described in Japanese Patent Laid-Open H6-291631 (hereinafter referred to as “Patent Document 1”) has been known as a conventional driving circuit of a voltage-driven type element. In FIG. 1 and pages 3 to 4 of Patent Document 1, a driving circuit is disclosed, which includes: a circuit for applying, to a gate of a voltage-driven type element, a gate voltage through a second switch and a second resistor capable of varying a resistance value; a circuit for removing a gate voltage from the gate of the voltage-driven type element through a first switch and a first resistor capable of varying a resistance value; a voltage detector for detecting a principal voltage value of the voltage-driven type element and varying the resistance values of the first and second resistors in accordance with the detected voltage valve; and a control circuit for on and off controlling of the first and second switches.
Then, when the detected principal voltage is less than a predetermined value, the resistance values of the first and second resistors are changed to be low, and when the principal voltage is at the predetermined value or more, the resistance values are changed to be high. As a result, the resistance values of the first and second resistors change in accordance with changes in the principal voltage in the turn-off and turn-on periods of the voltage-driven type element, and a discharge or charge speed from gate capacitance changes accordingly. In other words, at the time of turning-off, the principal voltage increases, and therefore, the first resistor changes from low resistance to high resistance, which results in a slow-down in the discharge speed. On the other hand, at the time of turning-on, the principal voltage decreases, and therefore, the second resistor changes from high resistance to low resistance. Consequently, the charge speed is slow at first, and becomes higher from a period when the principal voltage is at the predetermined value or less.
This driving circuit suppresses a surge voltage and noises by relaxing a voltage change dv/dt and a current change di/dt during the turn-off and turn-on periods.
Moreover, a technology described in Japanese Patent Laid-Open 2001-274665 (hereinafter referred to as “Patent Document 2”) has been known as a conventional driving circuit of a voltage-driven type element. In FIGS. 1 to 3 and pages 4 to 7 of Patent Document 2, a driving circuit is configured to apply a gate voltage from a second switch controlled by a second control circuit through a second resistor to a gate of a voltage-driven type element. Further, a first resistor connected to a first switch controlled by a first control circuit is connected in parallel with the second resistor. Moreover, a voltage detector for detecting a principal voltage value of the voltage-driven type element and a current detector for detecting a principal current value flowing in the voltage-driven type element are provided. The first control circuit includes a delay circuit for setting a delay time corresponding to the principal current value and turns on the first switch based on an on/off control signal against the second switch of the second control circuit. Meanwhile, after the principal voltage value detected in the voltage detector reaches a predetermined value, the first control circuit turns off the first switch after the delay time set by the delay circuit in accordance with the principal current value detected by the current detector.
Then, immediately after the turn-on/turn-off of the voltage driven type element, fast charge/discharge is performed against gate capacitance while maintaining a changing speed of a gate voltage at a high level using a low resistance value attributable to a parallel connection of the first and the second resistors. Thereafter, the first switch is turned off at timings according to a terminal voltage value and the principal current value, and the changing speed of the gate voltage is relaxed using a high resistance value only of the second control circuit, thereby preventing a surge voltage from increasing. In other words, mainly by changing the charge/discharge speed against the gate capacitance in the turn-on and turn-off periods, the increase in the surge voltage is prevented.
Furthermore, a technology described in Japanese Patent Laid-Open 2000-134075 (hereinafter referred to as “Patent Document 3”) has been known as a conventional driving circuit of a switching element. In FIG. 1 and the pages 2 to 3 of Patent Document 3, a driving circuit is disclosed, which includes: a circuit for voltage-driving a switching element such that a maximum value of a relative voltage change of a drive waveform driving the switching element is set to be at a predetermined value or less; and a circuit for applying negative feedback to the switching element.
In general, operational characteristics of a switching element change nonlinearly to a drive waveform, and even when a maximum value of a relative voltage change of the drive waveform is at a predetermined value or less, the relative voltage change of an output waveform is at a predetermined value or more. Therefore, even when only the drive waveform is blunted, a surge current and a surge voltage cannot be suppressed to be predetermined values or less. Hence, in this driving circuit, negative feedback is further applied, and a switching speed is slowed down within a range meeting a specification of a device or a circuit to suppress occurrence of a surge current and a surge voltage within rating.
Furthermore, an active gate drive technology has been recently used. Here, high controllability, which is a feature of the non-latching type switching element, is utilized to delicately adjust a gate voltage of the element in accordance with a collector-emitter voltage and the like at a time of switching transition. This technology thus suppresses a turn-off surge voltage and a turn-on surge current and evenly allocates voltages among the serially connected switching elements.
FIG. 1 shows a block diagram of a driving circuit that enables active gate drive. An active gate drive technology is a very effective technology for reducing main circuit parts and realizing a highly reliable inverter. However, on the other hand, there is a problem that, since a gate driving circuit becomes complicated, adjustment thereof becomes difficult. This will be explained hereinbelow using FIG. 1.
In FIG. 1, a control electrode of a switching element 9 is driven by a voltage source 2 through a resistor 8. The voltage source 2 generates a square-shaped voltage waveform in response to a gate signal supplied from a voltage source controller 1. Meanwhile, to the control electrode of the switching element 9, a current source 6 is also connected. A dv/dt detector 12 detects whether dv/dt, which is a time derivative value of a principal voltage of the switching element 9, is large or small, and a surge voltage detector 11 detects a surge voltage of the principal voltage. The current source 6 reduces the surge voltage based on outputs from these detectors, and adjusts a gate voltage of the switching element 9 to adjust a switching speed to be a desired dv/dt in accordance with a current control signal created by a current source controller 10. Thus, the principal voltage of the switching element 9 rises/falls at an appropriate dv/dt at a time of switching transition, and the surge voltage that can cause element destruction can be suppressed.
However, in the technology described in Patent Document 1, the voltage change dv/dt and the current change di/dt during the turn-off and turn-on periods are relaxed to suppress the surge voltage and noises. Therefore, there is a possibility that a high-speed switching characteristic of the voltage-driven type element is damaged to cause an increase in switching loss.
In the technology described in Patent Document 2, the increase in the surge voltage is prevented mainly by relaxing the charge/discharge speed against the gate capacitance in the turn-on and turn-off periods. Therefore, similar to the above, there is a possibility that a high-speed switching characteristic of the voltage-driven type element is damaged to cause an increase in switching-loss.
In the technology described in Patent Document 3, the occurrence of the surge current and surge voltage is suppressed by applying the negative feedback to the switching element to slow down the switching speed. Therefore, there is a possibility that an increase in switching loss is caused.
Moreover, in the active gate drive technology shown in FIG. 1, there are still some problems. First, feedback control loops are made up of two systems including the surge voltage and dv/dt, and an operation thereof may become unstable because these systems mutually interfere. To avoid this, it is necessary to adjust the gain of the two loops. However, since the loops are control loops operating only at the time of switching transition, the adjustment thereof is not easy.
Second, the technology shown in FIG. 1 is satisfactory in terms of the turn-off side. However, it is not easy to deal with the turn-on side. An only way for controlling dv/dt to reduce stress at a time of reverse recovery of a pair of FWDs also on the turn-on side is to provide another control loop. Thus, there is a problem with the technology shown in FIG. 1 in that adjustment is difficult and flexibility is lacking.
The present invention is made in consideration of the above. An object thereof is to provide a gate driving circuit for active gate drive which is simple and easily adjusted and capable of suppressing occurrence of a surge current and a surge voltage for certain without causing an increase in switching loss.